USB 3.0 IP core for FPGA
With the USB3.0 IP core, it is possible to develop a highly versatile FAT32 data recorder in a short period of time!
The 【USB3.0-IP】 complies with the USB3.0 standard Revision 1.0 and includes both the link layer and protocol layer, making it easy to implement a USB3.0 interface when combined with an external PHY chip from TI. A reference design compatible with Xilinx/Altera FPGAs is included as standard with the core product, which can help shorten product development time.
- 企業：デザイン・ゲートウェイ
- 価格：Other
